A transistor is often exposed to an external surge voltage e.g. an electrostatic surge voltage which is often generated in an IC or the like in which the transistor is employed, during a period in which the IC or the like is employed under environments where the IC or the like is rubbed with an insulator, resultantly electrostatic electricity is generated in and/or on the IC or the like. To protect the transistor from such an external surge voltage, an ingredient acting as an element to drive away the external voltage from the transistor or to cause the external voltage to bypass the transistor, is built in a semiconductor device in which the transistor is built as well.
A brief description of an example of such a semiconductor device provided with a planar bipolar transistor and a built-in ingredient acting as an element to protect the bipolar transistor from an external surge voltage e.g. an electrostatic surge voltage and the like will be presented below, referring to drawings, including FIG. 1 which illustrates a circuit thereof and FIG. 2 which illustrates a schematic layer configuration thereof.
Referring to FIG. 1, an input signal (IN) is applied to the base (B) of an NPN transistor (TR1), and the output signal (OUT) is taken out of the collector (C) of the transistor (TR1). A positive power supply (V.sub.CC) is applied to the collector (C) through a diode (d.sub.1) connected in a backward direction to the positive power supply (V.sub.CC). The collector (C) is grounded or is connected a fixed potential (V.sub.EE) or the ground potential through a diode (d.sub.2) bridging the collector (C) and the fixed potential (V.sub.EE) in a backward direction. In other words, the diode (d.sub.2) is connected to bridge the collector (C) and the fixed potential (V.sub.EE) or the ground potential in a direction toward the collector (C) from the fixed potential (V.sub.EE) the ground potential. The emitter (E) of the transistor (TR1) is grounded or is connected a fixed potential (V.sub.EE) or the ground potential, as well. In this circuit, a combination of two diodes (d.sub.1) and (d.sub.2) is a built-in ingredient (100) acting as an element to protect the transistor (TR1) from an external surge voltage. In the drawing, the built-in ingredient (100) is surrounded by a box shown in a broken line.
Referring to FIG. 2, the NPN transistor (TR1) consisting of a collector (2a), a base (2b) and an emitter (2c) is produced in a p-doped semiconductor substrate (1). In the neighborhood of the transistor (TR1), the diode (d.sub.1) consisting of a p-doped layer (101b) produced in an n-doped layer (101a) produced in the p-doped semiconductor substrate (1) and the diode (d.sub.2) consisting of a p-doped layer (102b) produced in an n-doped layer (102a) produced in the p-doped semiconductor substrate (1) are provided. The collector (2a) is connected the p-doped layer (101b) of the diode (d.sub.1) of which the n-doped layer (101a) is connected the positive power supply (V.sub.CC). The collector (2a) is also connected the n-doped layer (102a) of the diode (d.sub.2). The output signal (OUT) is taken out of the collector (2a). The input signal (IN) is applied to the base (2b). The emitter (2c) and the p-doped layer (102b) of the diode (d.sub.2) are grounded or connected the fixed potential (V.sub.EE).
An external positive surge voltage in excess of the power supply voltage (V.sub.CC) applied to the collector (C) causes the diode (d.sub.1) to turn on, resultantly being driven away toward the power supply (V.sub.CC) not to raid the transistor (TR1). An external negative surge voltage below the fixed potential (V.sub.EE) applied to the collector (C) causes the diode (d.sub.2) to turn on, resultantly being driven away toward the fixed potential (V.sub.EE) not to raid the transistor (TR1). In this manner, the transistor (TR1) is protected from an external surge voltage, regardless of the polarity thereof.
A piece of patent information, JP-A-95-122715, discloses a semiconductor device provided with a planar bipolar transistor attached by a monolithic ingredient acting as a parasitic bipolar transistor for protecting the bipolar transistor from an external surge voltage.
The foregoing semiconductor device provided with a bipolar transistor attached by a monolithic or built-in ingredient acting as a parasitic bipolar transistor for protecting the bipolar transistor from an external surge voltage is, however, involved with a drawback in which one or more parasitic capacitors is or are inevitably formed to be connected with the bipolar transistor. These parasitic capacitors readily decrease the operation speed of the circuit including the bipolar transistor. For example, referring to FIGS. 1 and 2, the operation speed of the transistor (TR1) is reduced by three potential parasitic capacitors including the one consisting of the wirings connecting the collector (2a) of the transistor (TR1) and the diodes (d.sub.1) and (d.sub.2), an insulator layer (1a) covering the top surface of the p-doped semiconductor substrate (1) and the p-doped semiconductor substrate (1), and the other two caused by depletion layers separating the p-doped layers and the n-doped layers of the diodes (d.sub.1) and (d.sub.2).